1. Field of the Invention
This invention generally relates to a host controller for use with a bus and a host in a digital system, such as a printer. More particularly, this invention relates to a host controller for use with a bus and a host that having a start of frame packet generator to relax frame timing of packet generation sequences.
2. The Prior Art
The personal computer industry has recently defined a new peripheral bus architecture and protocol, known as a Universal Serial Bus (USB). The architecture and protocol of the USB are defined in Compaq, et al., xe2x80x9cUniversal Serial Bus Specificationxe2x80x9d, Rev. 1.1 (Sep. 23, 1998), and as used herein, a Universal Serial Bus is any bus which substantially conforms to that specification or to any subsequent revision thereof. Universal Serial Bus has also been utilized in other digital systems such as printers.
A Universal Serial Bus is organized in a xe2x80x9ctiered starxe2x80x9d topology, with a hub at the center of each star. A host controls the bus, and usually is connected immediately to a root hub. One or more xe2x80x9cUSB devicesxe2x80x9d are connected in a star topology to the root hub, and such USB devices can include keyboards, mice, joysticks, fax/modems, telephony devices, and so on. The term xe2x80x9cUSB devicexe2x80x9d as used herein also includes further hubs, which may themselves constitute the center of a topological star of further USB devices. Thus, each USB device is separated on the bus from the host by some number of hubs in the serial pathway between the host and the device. The USB specification specifies a maximum topology in which no device is separated from the host by more than six hubs including the root hub.
The USB specification allows users to add and remove USB devices from the bus at any time. Whenever a hub detects the addition or removal of a device, it so notifies the host, which then determines the new USB topology in a procedure known as enumeration.
Data is transferred on a Universal Serial Bus within one millisecond intervals called frames. Each frame begins with a xe2x80x9cstart of framexe2x80x9d (SOF) token or packet, issued by the host at one millisecond intervals and concludes with an xe2x80x9cend of framexe2x80x9d (EOF) interval, during which no device is permitted to drive the bus. The intervening portion of each frame is referred to herein as a window during which bus transactions can take place.
The USB specification supports four different dataflow models, depending on the needs of each particular endpoint. An endpoint is a logical target within a device.
The four dataflow models are control transfers, bulk data transfers, interrupt data transfers and isochronous data transfers.
Control transfers are used for device configuration and can also be used for other device-specific purposes. Data delivery for control transfers is lossless.
Bulk transfers are usually used for larger amounts of data, such as for printers or scanners. Data delivery for bulk transfers is lossless, but the bandwidth that it occupies can be whatever is available and not being used for other transfer types.
Interrupt transfers are typically small, and may be presented for transfer by a device at any time. The device specifies a minimum rate (maximum number of frames of delay) at which the USB must deliver the data. Data delivery is lossless.
Isochronous transfers are for real time, time-sensitive delivery of data. An example of isochronous data is audio information. Such data must be delivered at the appropriate time, or errors are likely to result due to buffer or frame underruns or overruns. The Universal Serial Bus specification ensures timely delivery of isochronous data by assigning specific frame numbers to the data units to be transferred; if a data unit cannot be transferred in its designated frame number, the data unit is discarded.
According to the USB specification, higher level software in the host passes xe2x80x9ctransfer setsxe2x80x9d to a host controller (which may be hardware and/or software), which divides the transfer sets into xe2x80x9ctransactionsxe2x80x9d, each having a data payload size which is no greater than a predetermined maximum size for each of the four data transfer types. It is then up to the host controller to dynamically schedule these transactions for execution on the bus, in accordance with a number of rules. First, all isochronous transactions designated for a particular frame number must take place during that frame number or be discarded. Second, all interrupt transactions must take place within the time specified by the device. Third, all transactions to a particular endpoint must take place in the same sequence with which they are provided to the host controller, although there is no requirement that transactions destined for different endpoints take place in the same sequence with which they are provided to the host controller. Fourth, all transactions in a frame must complete before the EOF region of the frame.
As discussed above, USB uses 1 ms frames for bandwidth allocation and synchronization of devices on the bus. A USB host transmits an SOF packet every 1 ms at the beginning of each frame. The USB specification states that the frame interval must be 1.000 msxc2x1500 ns. However, this tight tolerance on the frame interval is important only to some devices using isochronous dataflow transfers. Moreover, this rigid requirement often can increase the amount of logic required in the host controller and limit the bus throughout.
USB uses a suspended state to conserve power, which is managed through the generation of the SOF packets. A USB device on the bus enters the suspended state after keeping an idle state on the bus for 3 ms. During multiple frames over which the host has no communications with the device, the SOF packets keep the device from entering the suspended state. To enter the suspended state, the host stops the generation of the SOF packets and the device will be idle. After 3, the device will enter the suspended state. Thus, one purpose of the SOF packets for USB devices utilizing bulk and/or interrupt transfers is to keep the devices from entering the suspended state. Unlike USB devices using isochronous transfers, USB devices using bulk and/or interrupt transfers do not need tight and rigid timing on the frame interval. For these devices, relaxation of the tight timing on the frame interval may reduce the amount of logic required to generate an SOF packet and increase the overall performance.
Accordingly, there exists a need for a USB host controller that can relax frame timing with respect to the generation of the SOF packets.
The present invention provides an apparatus and method for controlling SOF packet generation and capable of relaxing the frame timing of SOF packet generation sequences. In one aspect, the invention is a method of controlling packet generation in a bus through a host controller, wherein the host controller includes a timer that outputs a count signal at a predetermined time interval and a count expiration signal and the bus couples a host to a plurality of devices. The method includes performing the steps of producing a request for generating an SOF packet, determining if there is another transaction occurring in the bus, generating an SOF packet if there is not another transaction occurring in the bus, and delaying the generation of an SOF packet if there is another transaction occurring in the bus until the transaction is complete.
In another aspect, the invention is a method of controlling SOF packet generation in a bus through a host controller, wherein the host controller includes a timer that outputs a count signal at a predetermined time interval and a count expiration signal and the bus couples a host to a plurality of devices. The method includes performing the steps of writing an SOF enable bit having a first value or a second value, determining the value of the SOF enable bit, receiving a count expiration signal, producing a request for generating an SOF packet when the value of the SOF enable bit is the first value, and generating an SOF packet. The first value can be chosen as one (xe2x80x9c1xe2x80x9d), and the second value can be chosen as zero (xe2x80x9c0xe2x80x9d).
In yet another aspect, the invention is a host controller apparatus for use with a bus and a host, wherein the bus couples the host to a plurality of devices. The host controller has a microprocessor, a timer, and an SOF packet generator coupled to the microprocessor and the timer. The SOF packet generator can perform the steps of producing a request for generating an SOF packet, determining if there is another transaction occurring in the bus, generating an SOF packet if there is not another transaction occurring in the bus, and delaying the generation of an SOF packet if there is another transaction occurring in the bus until the transaction is complete. The microprocessor writes an SOF enable bit having a first value or second value and the timer outputs a count signal at a predetermined time interval and a count expiration signal to the SOF packet generator. The SOF packet generator produces the request for generating an SOF packet when the SOF enable bit has the first value, and maintains current count from the timer for at least one device in a suspended state when the SOF enable bit has the second value. In one embodiment of the invention, the first value is chosen as one (xe2x80x9c1xe2x80x9d), and the second value is chosen as zero (xe2x80x9c0xe2x80x9d).
These and other aspects will become apparent from the following description of the preferred embodiment taken in conjunction with the following drawings, although variations and modifications may be effected without departing from the spirit and scope of the novel concepts of the disclosure.